Keynote Speakers


Guest of Honour and Keynote Speaker #1


Prof.  Ivan Stojmenovic
Fellow IEEE

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Editor-in-chief of IEEE Transactions on Parallel and Distributed Systems

DBLP: http://www.informatik.uni-trier.de/~ley/db/

Google scholar: >13000 citations for 'I. Stojmenovic' (October 2012)
Top h-index score in Canada for mathematics and statistics, March 27, 2012, Globe and Mail
h-index: 56 (top h papers each with min h citations) (October 2012)
Top researcher in parallel and distributed systems by Google Scholar citations
Among top ten in algorithms and in wireless networks by GS citations
Listed among 600 computer science researchers with h>=40
Listed among top 100 researchers in networking & communications, Microsoft Academic Research
g-index: 93 (top g articles with >g citations on average)
>40 book chapters co-authored since 2002

Contact Information:

SITE, University of Ottawa,
800 King Edward, Ottawa,
Ontario K1N 6N5, Canada 

Short Biography

Ivan Stojmenovic received his Ph.D. degree in mathematics in 1985. He earned a third degree prize at the International Mathematics Olympiad for high school students in 1976. He held regular or visiting positions in Serbia, Japan, USA, France, Spain, Brazil, Hong Kong, Taiwan, China (Distinguished Professor, Tsinghua University in Beijing and Dalian University of Technology, 2010-2), UK (Chair in Applied Computing, EECE, University of Birmingham, 2007/8), Canada (SITE, University of Ottawa, since 1988).

He published >290 different papers in referred journals and conferences; >30 are in IEEE or ACM journals. He co-authored ‘Wireless Sensor and Actuator Networks’ (Wiley, 2010), and (co)edited five books with Wiley: ‘Handbook of Wireless Networks and Mobile Computing’ (2002), ‘Mobile Ad Hoc Networking’ (IEEE/Wiley, 2004), ‘Handbook of Sensor Networks’(2005), ‘Handbook of Applied Algorithms’ (2008), ‘RFID Systems’ (2010). He coauthored over 40 book chapters. He collaborated with >100 co-authors with Ph.D. and a number of their graduate students from 25 different countries. He (co)supervised >60 completed Ph.D. and master theses, and published over 130 joint articles with supervised students. His current research interests are mainly in wireless ad hoc, sensor, vehicular, actuator and robot networks. His research interests also include security, parallel computing, multiple-valued logic, evolutionary computing, neural networks, combinatorial algorithms, computational geometry, graph theory, computational chemistry, image processing, programming languages, and computer science education. He was cited >11000 times. His h-index is 52 (he is listed among 250 computer science researchers with h≥50; top h-index in Canada for mathematics and statistics) and g-index is 101. ESI Special Topics listed him #3 in papers, #9 in cites/paper, and #20 in total cites among all authors Wireless/Mobile Networks 1995-2005. One of his articles, on broadcasting in ad hoc wireless networks, was recognized as the Fast Breaking Paper, for October 2003 (as the only one for all of computer science), by Thomson ISI Essential Science Indicators http://esi-topics.com/fbp/fbp-october2003.html. Microsoft Academic Research lists him among top 100 researchers in networking & communications. He received four best paper awards at conferences (IFIP PWC 2004, SENSORCOMM 2008, CSA 2009, ICA3PP 2011) and Excellence in Research Award of the University of Ottawa for 2009. He presented a number of tutorials and invited talks. He is Tsinghua 1000 Plan Distinguished Professor (2012-5). He is recipient of the Royal Society Research Merit Award, UK, 2007-8. He is Fellow of the IEEE (Communications Society, class 2008), and Canadian Academy of Engineering (since 2012). He was IEEE CS Distinguished Visitor 2010-11. Stojmenovic received (as PI or co-PI) about 30 grants from Serbia, Canada, Mexico, China, USA, UK, Japan and EU). He received two NSERC Collaborative Research Development (CRD) projects and two NSERC Strategic Grants. He was Director of the Ottawa-Carleton Institute for Computer Science (2002-2004).

He is editor-in-chief of IEEE Transactions on Parallel and Distributed Systems (2010-2013), managing editor of Journal of Multiple-Valued Logic and Soft Computing (received Certificate of Appreciation from IEEE Computer Society in 2002 for establishing and maintaining the journal), International Journal of Parallel, Emergent and Distributed Systems (T& F), and Ad Hoc & Sensor Wireless Networks, An International Journal (OCP), and editor of several journals including ACM Wireless Networks, Parallel Processing Letters, JCST, IJHPCN, IJWMC, IJPCC, JIE, IJVT, JWCN. He recently guest edited special issues in several journals including IEEE TAC, IEEE JSAC, IEEE TPDS, IEEE Computer Magazine, IEEE Networks, IJDSN, Wireless Communications and Mobile Computing, Ad Hoc Networks, Telecommunication Systems, Cluster Computing, Int. J. Found. Computer Science. Stojmenovic founded several workshops: WWASN at IEEE ICDCS, WiSARN at IEEE WoWMoM, IEEE/ACM CPSCom, IEEE MASS and IEEE INFOCOM, FOWANC at ACM MOBIHOC, LOCAN at IEEE MASS and MSN, LOCALGOS at IEEE DCOSS, and organized several research workshops. He is/was program chair for >30 events, including conferences FCST 2010, AdHocNow 2008, IEEE PIMRC 2008, EUC 05,08,09,10, IEEE AINA-07, IEEE MASS-04, and -07, InterSense-06, WONS-05, MSN-05 and -06, ISPA-05 and -07, and workshops at IEEE ICDCS 2003-07; IEEE LCN-05-06, HICSS, 2000, 2002, 2003; ICPDS-02; ICPP-00. He was also general co-chair, organizer, steering committee member, advisor, award, or workshop chair for ≈30 events since 2002, including IEEE INFOCOM, IEEE MASS, IEEE DCOSS, ACM Mobicom/Mobihoc, IEEE ICPADS, IEEE IPDPS, IFIP WMNC, IFIP WSAN, IFIP PWC. Stojmenovic served as member of >200 program committees.



Keynote Speaker #2


Prof. Peter Widmayer  

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Associate Editor, Journal of Parallel and Distributed Computing, Elsevier
Associate Editor, ACM Computing Surveys
Editor, Acta Informatica, Springer
Editor, Computational Geometry, Elsevier
Editor, Computer Science Review, Elsevier

DBLP: http://www.informatik.uni-trier.de/~ley/db/indices/a-tree/w/

Contact Information:

ETH Zürich
Institut f. Theoretische Informatik
Universitätstrasse 6
8092 Zürich

Short Biography

Peter Widmayer is at the Institute of Theoretical Computer Science at the Swiss Federal Institute of Technology (ETH) in Zurich since 1992. Before, he was with Freiburg University (Germany), Karlsruhe University (Germany), and IBM T.J. Watson Research Center (NY, USA). He coauthored more than 200 peer reviewed papers in the areas of algorithms and data structures for a variety of combinatorial and geometric problems, distributed algorithms, and algorithms for databases, as well as three books on algorithms and on programming. He has been a program committee member of well above 100 conferences in the areas of algorithms, databases, theoretical computer science, and a program committee and conference (co-) chair of more than 20 conferences in these areas. He serves on the editorial board of the ACM Computing Surveys; Acta Informatica; Computational Geometry: Theory and Applications; Computer Science Review; ICTS Transactions on Algorithms Engineering; Informatica Didactica; Journal of Spatial Information Science; Journal of Parallel and Distributed Computing (until 2011); Journal of Universal Computer Science.

Throughout his teaching career, Prof. Widmayer has supported the use of the computer to transfer knowledge. With his colleagues, he has produced media courses on a variety of topics relating to the area of algorithms and data structures. One of his textbooks "Algorithmen und Data Structuren" (in collaboration with Th. Ottmann), is available in electronic form.



Keynote Speaker #3


Prof. Assaf Schuster

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Subject area editor Journal of Parallel and Distributed Computing
Associate editor of IEEE Transactions on Computers

DBLP : http://www.informatik.uni-trier.de/~ley/db/indices/a-tree/s/Schuster:Assaf.html

Contact Information:

Department of Computer Science
Technion - Israel Institute of Technology
Technion City, Haifa 32000, Israel

Short Biography

Prof. Assaf Schuster has been with the Technion – the Israel Institute of Technology – since 1991. He established  DSL – the Distributed Systems Laboratory, which later became CSL – the Computer Systems Laboratory (http://dsl.cs.technion.ac.il), now hosting eight faculty members, more than forty graduate students, and hundreds of undergraduate students. Over the years, Prof. Schuster has been interested in various aspects of parallel and distributed computing, at all granularity levels, from fine-grain threads, through tightly- and loosely-coupled resource pools, to large-scale, global systems. He has published papers on a wide range of topics, including computer architecture, virtualization systems, concurrency bugs, verification software, shared memory, memory models, monitoring of data streams, multi-level caching, data mining, peer-to-peer networks, and privacy preservation. His race detection algorithm was implemented in Intel’s Thread Checker, and his patents on distributed shared memory were sold by the Technion. One of his published papers triggered a rewrite of the Java Memory Model. He has built scalable production systems to handle petabytes of storage with off-the-shelf hardware. He has supervised more than fifty doctoral and master’s degree students, served as an editor of professional journals, was on the program committee of various top conferences, participated in national and international consortia, and his research was granted millions of dollars in funding by the EC, by national funding agencies, and by the industry (Microsoft, Intel, Google, Sun, Mellanox, to name only a few). He has served on the advisory board of and as a consultant to government agencies and international companies (such as HP, IBM, and Microsoft), and to startups (some of which, like Qumranet, were big success stories).

Over the academic year of 2010/11, Prof. Schuster has been working to establish TCE – the Technion Center for Computer Engineering, which he heads. TCE is a center of activity for dozens of applied computer scientists from the CS and EE departments of the Technion and other universities. In addition to faculty, TCE will host hundreds of leaders of industrial research and innovation. TCE’s mission is tailored to the Israel’s unique position as a small “start-up nation”: namely, to foster interaction between academy and industry by colocating them and by enforcing relaxed IP rules. TCE has already tens of millions of dollars in funding.

Assaf Schuster lives in Haifa. His apartment has a wonderful view of the sea and the Carmel. He is the father of three: Roei, 24, who is a graduate of Technion CS and is researching the Android security framework for his master’s thesis; Maya, 22, who is working for a hi-tech startup and will soon become a bio-Informatics student; and Itai, 11, who likes to play computer games and is the real genius of the family. Assaf Schuster’s hobbies over the years have included cross-country biking, Indian cooking, concerts, reading, the game of Go, and trombone playing. Now that he is a professor, he has little time for any of these. His preferred coffee is macchiato. He follows basic Chinese dietary rules for good health.



Keynote Speaker #4


Prof. Nikil Dutt,
Fellow IEEE and ACM Distinguished Scientist

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Editor-in-Chief, ACM Transactions on Design Automation of Electronic Systems (ACM-TODAES)
Associate Editor, ACM Transactions on Embedded Computer Systems (ACM-TECS)
Associate Editor, IEEE Transactions on VLSI Systems (IEEE-TVLSI)

DBLP: http://www.informatik.uni-trier.de/~ley/db/indices/a-tree/d/Dutt:Nikil_D=.html

Contact Information:

Chancellor’s Professor
Department of Computer Science, Zot Code 3435
Donald Bren School of Information and Computer Sciences 
University of California, Irvine
Irvine, CA 92697-3435, USA

Short Biography

Nikil D. Dutt is a Chancellor’s Professor at the University of California, Irvine, with academic appointments in the CS and EECS departments.  He received a B.E.(Hons) in Mechanical Engineering from the Birla Institute of Technology and Science, Pilani, India in 1980, an M.S. in Computer Science from the Pennsylvania State University in 1983, and a Ph.D. in Computer Science from the University of Illinois at Urbana-Champaign in 1989. He is affiliated with the following Centers at UCI: Center for Embedded Computer Systems (CECS), California Institute for Telecommunications and Information Technology (Calit2), the Center for Pervasive Communications and Computing (CPCC), and the Laboratory for Ubiquitous Computing and Interaction (LUCI).

Professor Dutt’s research interests are in embedded systems, electronic design automation, computer architecture, optimizing compilers, system specification techniques, distributed systems, formal methods, and brain-inspired architectures and computing. He is a coauthor of seven books: "High-Level Synthesis: Introduction to Chip and System Design", Kluwer Academic Publishers, 1992, "Memory Issues in Embedded Systems-on-Chip: Optimizations and Exploration", Kluwer Academic Publishers, 1999, "Memory Architecture Exploration for Programmable Embedded Systems", Kluwer Academic Publishers, 2003, "SPARK: A Parallelizing Approach to the High-Level Synthesis of Digital Circuits", Kluwer Academic Publishers, 2004, "Functional Validation of Programmable Embedded Architectures: A Top-Down Approach", Springer-Verlag, 2005, “On-chip Communication Architectures: Current Practice, Research and Future Trends,” Morgan Kaufman/Elsevier Systems-on-Silicon Series, 2008, and “Processor Description Languages: Applications and Methodologies,” Morgan Kaufman/Elsevier Systems-on-Silicon Series, 2008.

Professor Dutt’s research has been recognized by Best Paper Awards at the following conferences: CHDL’89, CHDL’91, VLSI Design 2003, CODES+ISSS 2003, CNCC 2006, ASPDAC 2006, and IJCNN 2009; and Best Paper Award Nominations at: WASP 2004, DAC 2005, and VLSI Design 2006.  He has also received a number of departmental and campus awards for excellence in teaching at UC Irvine.

Professor Dutt currently serves as Associate Editor of ACM Transactions on Embedded Computer Systems (TECS) and of IEEE Transactions on VLSI Systems (TVLSI). He served as Editor-in-Chief of ACM Transactions on Design Automation of Electronic Systems (TODAES) between 2004-2008. He was an ACM SIGDA Distinguished Lecturer during 2001-2002, and an IEEE Computer Society Distinguished Visitor for 2003-2005.  He has served on the steering, organizing, and program committees of several premier CAD and Embedded System conferences and workshops.  His recent major conference activity includes: TPC Co-Chair DAC-2010/2011, General Co-Chair ESWEEK 2008, and TPC Co-Chair CODES+ISSS 2007. He currently serves on, or has served on the ACM Publications Board, the advisory boards of ACM SIGBED, ACM SIGDA, and IFIP WG 10.5. He is a Fellow of the IEEE, an ACM Distinguished Scientist, and an IFIP Silver Core awardee.



Keynote Speaker #5


Prof.  Eliezer Dekel 

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Subject Area Editor for the Journal of Parallel and Distributed Computing, Elsevier
Editor in chief of ICST Transaction on Financial Systems 

DBLP: http://www.informatik.uni-trier.de/~ley/db/indices/a-tree/d/Dekel:Eliezer.html

Contact Information:

STSM, Manager, Distributed Middleware
IBM Haifa Research Lab, Haifa, Israel

Short Biography

Eliezer Dekel is an IBM Senior Technical Staff Member. He is managing the Distributed Middleware group in the IBM Haifa Research Lab. Eliezer led the development of the Distribution and Consistency Services (DCS) component for WebSphere. The DCS component is the foundation for WebSphere's High Availability. It is the first virtual synchrony group communication implementation that is part of commercial application server.

Eliezer Dekel is the editor in chief of ICST Transaction on Financial Systems and a subject area editor for the Journal of Parallel and Distributed Computing (JPDC). He is the business chair of ICST SIB Council on Future Information Systems. Eliezer served on numerous conference program committees and organized, or served as chair in some of them. Since joining the Haifa Research Lab in 1992, he has been involved in research in the areas of distributed and fault-tolerant computing, service-oriented technology, and software engineering. He is currently working on technologies for providing Quality of Service, with a focus on dependability, in very large scale multi-tier environments. For this area he initiated together with colleagues the very successful International Workshop on Large Scale Distributed Systems and Middleware (LADIS). This workshop, now in its fourth year, was one of the first workshops to focus on the foundations of "cloud computing." He was an organizer of CloudSlam'09 the first cloud computing virtual conference. Eliezer is also involved in the EU FP7 ICT funded CoMiFin (Communication Middleware for Monitoring Financial Critical Infrastructure) project.

Eliezer has a Ph.D. and M.Sc. in computer science from the University of Minnesota, and a B.Sc. in mathematics from Ben Gurion University, Israel. Prior to joining the IBM Haifa Research Lab, Eliezer served on the faculty of the University of Texas at Dallas computer science department for over ten years.



Keynote Speaker #6


Prof. Sanjay Ranka
Fellow IEEE and AAAS



Associate Editor-in-Chief of the Journal of Parallel and Distributed Computing
Associate Editor of IEEE Transactions on Parallel and Distributed Computing
Associate Editor of IEEE Transactions on Computers
Associate Editor of Sustainable Computing: Systems and Informatics
Associate Editor of Knowledge and Information Systems
Associate Editor of International Journal of Computing

DBLP: http://www.informatik.uni-trier.de/~ley/db/indices/a-tree/r/Ranka:Sanjay.html

Contact Information:

E 301 CSE Bldg,
Dept of CISE,
University of Florida,
Gainesville, FL 32611, USA

Short Biography

Sanjay Ranka is a Professor in the Department of Computer Information Science and Engineering at University of Florida. His current research interests are energy efficient computing, high performance computing,  data mining and informatics. Most recently he was the Chief Technology Officer at Paramark where he developed real-time optimization software for optimizing marketing campaigns. Sanjay has also held positions as a tenured faculty positions at Syracuse University and as a researcher/visitor at IBM T.J. Watson Research Labs and Hitachi America Limited.

Sanjay earned his Ph.D. (Computer Science) from the University of Minnesota  and a B. Tech. in Computer Science from IIT, Kanpur, India. He has coauthored two books: Elements of Neural Networks (MIT Press) and Hypercube Algorithms (Springer Verlag), 75 journal articles and 125 refereed conference articles. His recent work has received a student best paper award at ACM-BCB 2010, best paper runner up award at KDD-2009, a nomination for the  Robbins Prize for the best paper in journal of Physics in Medicine and Biology for 2008, and a best paper award at ICN 2007.

He is a fellow of the IEEE and AAAS, and a member of IFIP Committee on System Modeling and Optimization. He is the associate Editor-in-Chief of the Journal of Parallel and Distributed Computing and an associate editor for  IEEE Transactions on Parallel and Distributed Computing, IEEE Transactions on Computers, Sustainable Computing: Systems and Informatics, Knowledge and Information Systems, and  International Journal of Computing.

He was a past member of the Parallel Compiler Runtime Consortium, the Message Passing Initiative Standards Committee and Technical Committee on Parallel Processing.  He is the program chair for 2010 International Conference on Contemporary Computing and co-general chair for 2009 International Conference on Data Mining and 2010 International Conference on Green Computing. 

Sanjay has had consulting assignments with a number of companies (AT&T Wireless, IBM, Hitachi) and has served as an expert witness in patent disputes.






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