Electronics And Communication Engineering  

 . Prof. Dr. T.S.Lamba
 . Prof. Dr. Sunil Bhooshan
 . Prof. Dr. D.C.Kulshrestha
 . Dr. G.Singh
 . Dr. D.S. Saini
 . Dr. Pradeep Kumar
 . Dr. Rajiv Kumar
 . Dr. Rohit Sharma
 . Dr. Vinay Kumar
 . Dr. Vivek Sehgal
 . Mr. Alok Joshi
 . Mr. Bhasker Gupta
 . Mr. Jitendra Mohan
 . Ms. Neeru Sharma
 . Ms. Pragya Gupta
 . Mr. Sajai Vir Singh
 . Mr. S.V.R.K Rao
 . Ms. Shruti Jain
 . Mr. Tapan Jain
 . Mr. Mohammad Wajid
 . Mr. Pardeep Garg
 . Mr. Salman Raju Talluri
 . Ms. Vanita Rana
 . Mr. Vipin Balyan
 . Mr.Viranjay Srivastava
 . Mr. Munish Sood
 . Mr. Vikas Hastir
 . Mr. Vinod Kumar

Viranjay M. Srivastava

Lecturer

E-mail : viranjaymohan@gmail.com ; viranjay@ieee.org

Office: Deptt. Of ECE,

Telephone : (+91) 1792-239-321, (+91) 9805277711 (M)

Lab: CL-3,

Lab phone:+91-1792-239-234

 

Education:

1. Pursuing Ph.D. in microelectronics.

2.  M.Tech.(VLSI Design),C-DAC,Noida, India

3. B.Tech.(Electronics & Instrumentation Engg.), IET, Rohilkhand University, Bareilly, U.P., India

 

Research Interests

VLSI design, Low-power design, Chip designing
VLSI design My research and teaching interests include VLSI design/CAD with particular emphasis in low-power design, Chip designing, VLSI testing and verification. I published papers in refereed journals and conferences, and also author of the book, VLSI Technology, Kamal Publishing House, Kanpur, India.

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Brief Background :

Professional Experience
1. July’2008 – till date: Lecturer, Electronics and Communication Engineering Department, Jaypee University of Informtion Technology, Wakanghat, Solan, India.

2. July’2002-July’2006: Sr. Lecturer, Electronics and Communication Engineering Department, Saroj Educational Group, Lucknow, India.

Biography

Viranjay M. Srivastava received the B.Tech. Degree in Electronics and Instrumentation Engineering from the Rohilkhand University, Bareilly, India and the Masters degree from the VLSI Design Department, Center for Development of Advanced Computing (C-DAC), Noida, India. He is pursuing Ph.D. in field of microelectronics.
He was with the Semiconductor Process and Wafer Fabrication Center of BEL, Bangalore, India, where he worked on characterization of MOS devices, fabrication of devices and development of circuit design. He joined the electronics and communication engineering faculty, Saroj Educational Group, Lucknow, in 2002. Currently he is in Jaypee University of Information Technology, Solan, Himachal Pradesh, India.

 

Work shops/Seminars/Conferences Attended :

1. Workshop on “Circuit Simulation using SPICE & VHDL” 8th – 10th April’2006 Organized by MNNIT, Allahabad.
2. Workshop on “Computer Vision Based Human Gesture Recognition & It’s Applications” 20th – 21st April’2006 organized by IIT, Delhi.
3. Workshop on “Organic Electronics” by SCDT, 17th – 21st July’2006 organized by IIT, Kanpur.
4. Workshop on “IPR workshop 2007” 31st March- 1st April’2007 organized by IIT, Kanpur.
5. Workshop on “Current trends in CAD Tools for VLSI Design"12th April’2007 Organized by C-DAC, Noida.
6. Workshop on “NPTEL-2007” 27th – 28th June’2007 organized by IIT, Kanpur.
7. National Seminar on “e-Security Education through e-Learning” 14th Dec’2007 organized by C-DAC, Noida.

 

Projects/Research:

1. C-V Measurement using VEE Pro Software after Fabrication of MOS Capacitance, BEL, Bangalore.
2. Analysis and modeling of Double-Gate MOSFET's, C-DAC, Noida.
3. Adaptive HOP generation system in Bluetooth using VerilogHDL, C-DAC, Noida.

 

Prizes & Achievements:

  1. GATE-2006 Qualified, All India Rank-662 in Instrumentation Engineering.
  2. First prize awarded by Akhil Bhartiya Vidhyarthi Parishad (ABVP)-Varanasi for 1ST position in 12th U.P.Board Exam-1996 in Varanasi, U.P.
  3. Honors prize in debate competition organized by ROTARY CLUB (SOUTH) Varanasi, U.P.

 

Professional Membership
Member, Institute of Electrical and Electronics Engineers (IEEE) USA
Member, Association of Computer Electronics and Electrical Engineers (ACEEE)
Life Member, International Association of Computer Science & Information Technology (IACSIT) Singapore
Member, International Association of Engineers (IAENG) Hong Kong

 

                                                                               

Publications

Journals

1. Viranjay M. Srivastava,” Capacitance-Voltage Measurement for Characterization of a Metal-Gate MOS Process,” International Journal Conference in Recent Trends in Electrical & Electronics, Indexd in ACEEE, IEE, EI, Thompson ISI, Issue 1, Vol. 1, May’2009.

Conferences

1. Viranjay M. Srivastava,” Extraction of MOS Device Parameters from C-V Measurements,”International Conference on Advanced Computing and Technology (ICACT-2008), p.p.102-104, Dec’26-27, 2008, Hyderabad, India.

2. Viranjay M. Srivastava, Prabhakar Kumar,”e-Appliances Controller,” National Conference on Application Specific Trends of Electronic Devices Circuits and systems (ASTECS-09) on Feb’6–7, 2009, Lingaya University, Faridabad, India

3. Viranjay M. Srivastava,” Relevance of VEE Programming for Measurement of MOS Device Parameters,” IEEE International Advance Computing Conference (IACC’09) on March 6-7, 2009, Thapar University, Patiala, India

4. Viranjay M. Srivastava, Nitish Paliwal, Anupam Chahar, “Data Transmission using Variation in Intensity of Light,”  IEEE National Conference on VLSI, Embedded systems, Signal Processing & Communication Technologies (NCVESCOM-09) Apr, 7-8, 2009, Vinayaka University, Chennai, India

5. Viranjay M. Srivastava, Nitish paliwal, “Transmission of Data using Distinct Intensity Levels in IR Radiations,” 1st IEEE International Conference on Computational Intelligence, Communication Systems and Networks (CICSYN’09) Organized by UKSim on July 23-25, 2009, Indore, India

6. Viranjay M. Srivastava, K. S. Yadav, G. Singh, “Double Pole Four Throw Switch Design with CMOS Inverter,” 5th IEEE Conference on Wireless Communication and Sensor Networks (WCSN-2009) Organized by IIIT Allahabad, on Dec.’ 15-19, 2009, Allahabad, India.

7. Viranjay M. Srivastava, Priyank, Sharad, G. Singh, “Paracitic Capacitances in Double Gate MOSFET,” IEEE International Conference on Recent Trends in Information, Telecommunication and Computing (ITC-2010), on March 12-13, 2010, Kochi, India.

8. Viranjay M. Srivastava, Rachit Patel, Harpreet Parashar, G. Singh, “Reduction of Paracitic Capacitances for Transmission Gate with Help of CPL,” IEEE International Conference on Recent Trends in Information, Telecommunication and Computing (ITC-2010), on March 12-13, 2010, Kochi, India.

9. Viranjay M. Srivastava, Shipra Kapoor, Nitasha Bist, Nutan Jaswal, G. Singh, “Full Subtractor Circuit Design with Independent Double Gate Transistor,” IEEE International Conference on Recent Trends in Information, Telecommunication and Computing (ITC-2010), on March 12-13, 2010, Kochi, India.

 

National(Books): VLSI Technology (for UPTU, Lucknow)

 

Reviewer for International Conferences
1. 5th IEEE Conference on Automation Science and Engineering (IEEE-CASE)
2. Member, Scientific and Technical Committee & Editorial Review Board, World    Academy of Science, Engineering and Technology (WASET)
3. International Conference on Advances in Recent Technologies in Communication and Computing, (ARTCom 2009), Sponserd by IEEE Computational Intelligence Society.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

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