Electronics & Communication Engineering

Dr. Harsh Sohal

Dr. Harsh Sohal
Associate Professor
( 91)-01792-239506
harsh.sohal@juit.ac.in
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Biography :

Ph. D. from Kyung Hee University, South Korea. He specialises in FPGA based instrumentation system design with a focus on FPGA implementation of Algorithms catered to the application requirements. His primary research interests are in the field of Digital System Design (including customized processor architecture), electronic instrumentation, circuits & systems design for medical electronics applications. He is a member of IEEE and is a life member of biomedical engineering society of India. His research plans include application specific implementation of various algorithms, VLSI Digital Signal Processing.

Area of Expertise:
FPGA implementation of Algorithms
FPGA based Instrumentation System Design
VLSI (FPGA based) Digital Signal Processing
Low Power Digital VLSI Design

Software and Hardware Skills:
Xilinx Vivado, Xilinx Project Navigator
Quartus II (Altera)
T-SPICE
C Programming
VHDL, Verilog HDL

List of B. Tech. /M. Tech. /PhD Projects completed/ongoing:
1) A Low power wearable ECG module for Heart Rate Variability Classification system
2) Ultra Low Power Techniques for Implantable Electronics
3) High Speed Radix-2 Butterfly Structure using Novel Wallace Multiplier
4) Design and Performance Analysis of Processor Specific Data Processing Device for Energy Efficient Data centre
5) Design and Performance Analysis of Intra-network controller for KHU Mark 2.5 EIT System for various FPGA platforms
6) Design of Bio potential Amplifiers for Bio signal Acquisition Application
7) Design of Solar Charge Controller for Photovoltaic Module using FPGA
8) Implementation of Heart Rate Variability Algorithm on FPGA using HDLs
9) FPGA based Singular Value Decomposition Processor
10) Arbitrary Waveform Generator Implementation on FPGA
11) Implementation of Various Communication Protocols on FPGA (using Verilog HDL)

Author Publication Profile:
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